There’s a rumor that’s popped up in the past several days concerning AMD’s long-term plans for 7nm and 5nm. According to this rumor, which began with a DigiTimes post now sealed behind a paywall, AMD is now considered a Tier 1 TSMC customer.
Supposedly, this newfound friendship between the two companies will result in AMD launching Zen 3 on 5nm to steal a march on Intel in a further extension of AMD’s overall market leadership. There are several reasons why this is unlikely.
First, there’s a significant lag time between when CPU designs are sent to the foundry for manufacturing (a process called taping out) and when they ship to customers. First, AMD sends the design to TSMC. Then they test the hardware TSMC sends back, and tweak the design as necessary. All of this takes several months, best-case. I don’t know where AMD is in the Zen 3 design process, but 5nm is going to have entirely different design rules than 7nm. There’s no way to quickly port from one to the other. Leaping ahead in this fashion isn’t done because the long lead times make it impossible.
Second, it’s not clear how much advantage 5nm offers to AMD in the first place. TSMC is predicting a 45 percent density advantage, which is great, but only up to 20 percent better power efficiency or 15 percent additional performance. Keep in mind, these are best-case scores, and to some extent, they are either/or.
I don’t want to imply in any way that AMD won’t have a 5nm chip — they’ve already got one on the roadmap — but it’ll have to balance the design carefully to improve performance. At the Zen 2 briefing, AMD’s engineers told us candidly they were surprised they were able to offer any frequency improvements at all at 7nm. This doesn’t bode well for clock scaling at 5nm. The Zen 4 team will be working on that problem already, given AMD’s described design cadence.
Third, AMD also doesn’t typically lead the way on foundry node transitions. Apple and Qualcomm occupy that role these days, and we’d expect the next-generation iPhone and Snapdragon parts to account for much of the 5nm capacity when the node launches.
If you want another example of how hard it is to backport features to a different process node, consider Intel. Skylake launched in 2015. If you believe the rumors, Rocket Lake is a 14nm chip with backported 10nm features launching later this year. It’ll be the first new CPU architecture from Intel in five years.
It didn’t take Intel 5 years to backport 10nm capabilities into a 14nm core, but the company was talking to us journalists about its efforts to make that kind of flexibility possible in 2018. Even if you assume they hadn’t even started the work yet (a poor assumption, in my opinion), it took two years to finish. Moving a CPU architecture between nodes is not a trivial undertaking.
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