Intel unleashed a great deal of information about its upcoming products this morning, including new details on Tiger Lake, its upcoming mobile chip. There’s been no small amount of speculation about what kind of performance the new CPU would offer, especially after Ice Lake received mixed reviews on the CPU side. While the 10nm chip’s GPU was a significant jump forward for Intel, the CPU’s higher IPC was balanced by a lower maximum frequency. Overall, Intel had to give up almost exactly as much frequency as it gained in IPC and performance, outside a few specific cases, was largely static against Intel’s 14nm family of chips.
Tiger Lake is intended to change that by reclaiming the frequency that Intel had to give up last generation. The company has made a number of improvements to its 10nm process node and it’s collectively marketing them as “SuperFin.”
Tiger Lake’s gate pitch is larger, meaning Intel decreased its density slightly to improve its electrical characteristics. This isn’t surprising, the company did something similar over the lifetime of 14nm as well. Improvements to channel mobility and reduced resistance lower the overall buildup of heat within the chip and increase the effective frequency the CPU can reach.
Intel has also developed an improved metal-insulator-metal capacitor. This is a type of on-die capacitor used to respond rapidly to transient current spikes. David Kanter of RealWorldTech wrote a deep dive into MIMs and how they compare to MOSFETs and deep trench capacitors if you want more information on the topic.
The result of these improvements is a dramatic leap in overall dynamic range and frequency response. Intel doesn’t formally claim that Tiger Lake can hit 5GHz, but if you look at the curve above, the implication is there:
One major change Intel is making with Tiger Lake is the switch from an inclusive L2 to a larger, non-inclusive L2. This was one of the more surprising disclosures about Tiger Lake; Intel’s L2 cache was just 512KB on Ice Lake and was inclusive of its 32KB L1i / 48KB L1d caches. Tiger Lake also allocates a larger L3 cache — up to 3MB per core, compared to 2MB for Ice Lake. I don’t want to speculate on exactly what kind of impact we should expect from this change until we’ve actually seen the CPU.
What all this adds up to, according to Intel, is one mammoth performance jump:
Intel isn’t really using its “+” nomenclature, but what we’ve heard from the company in the past is that the barely-there Cannon Lake counts as 10nm, Ice Lake is 10nm+, and Tiger Lake is built on 10nm++. The slide above applies a bit of a redefinition, with Ice Lake now “10nm” and Tiger Lake positioned as the 10nm intranode. Regardless, Intel is claiming to have delivered the same degree of performance improvement from ICL to TGL as it delivered across all of its 14nm product lines. Note that the y-axis isn’t measuring absolute performance improvement, but performance improvement at the same leakage.
Tiger Lake will also add additional EUs and move to Intel’s Xe graphics. This will be the first place we see Intel’s upcoming graphics architecture and there’s a fair bit of excitement and curiosity over what the firm will launch. Nobody expects Xe to be an Nvidia-killer out of the gate — initial architectures from a new company (which is what Intel basically is in this space) don’t really do that — but a three-way race would push all competitors to evolve GPU technology more quickly.
There’s a lot more to talk about and I’m going to have more to say about it later this morning, but I want to take a moment to speak to how Tiger Lake looks overall, particularly against AMD. If Intel can deliver the improvement in clock speeds that it claims it can, AMD is going to facing serious competition in mobile this year. It wouldn’t be surprising if Intel leaps ahead with Tiger Lake, only for AMD to pull even (or ahead) when Zen 3 APUs debut for mobile. That kind of back-and-forth between the two companies was normal on desktop from early 2017 – mid-2019.
It isn’t surprising to see Intel debut a significantly improved 10nm — the company signaled confidence in the node when it canceled its lower-end 14nm Cooper Lake Xeons last year. The question is, can Intel ship these parts in significant volume? We’ll know more when we see how Intel positions any remaining 14nm CPUs in the 11th Generation (presumed) mobile Core family as opposed to 10nm parts, and how easy they are to find on store shelves.
The implication of Intel’s last conference call is that the company is going to take a margin hit as it scales up 10nm production more aggressively. The company has carefully managed its available production for the past few years, ceding ground in low-end chips to focus its production on enterprise and server parts.
It would be premature to declare that Intel had turned a corner on 10nm until we’ve seen Tiger Lake in action and have evidence that the chips are available in volume, but Intel is claiming a solid set of improvements for its next iteration of 10nm.
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